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集成电路Integrated Circuits

小树打开展馆导览器的模型。为什么指甲大小的芯片能装下复杂电路?Mia examines a model of the museum’s audio guide. How can a fingernail-sized chip contain a complex circuit?

第 1 步:把元件放到同一小片上Step 1: Put components on one small chip

先比较两种连接方法。Compare two ways of connecting components.

Put components on one small chip
早期电路常连接独立元件。集成电路把许多元件做在小片材料上。微小连线把它们接起来。这样能减少体积与部分连接问题。Earlier circuits often linked separate components. An integrated circuit forms many components on a small piece of material. Tiny interconnections join them. This reduces size and some connection problems.

第 2 步:开关组合成计算Step 2: Switches combine into computation

很多小元件怎样一起工作?How do tiny components cooperate?

Switches combine into computation
晶体管可用作电子开关。开关组合成逻辑电路。逻辑电路可以处理二进制信息。芯片也能处理模拟信号,不只做计算。Transistors can act as electronic switches. Groups of switches form logic circuits. Logic circuits process binary information. Chips can also handle analogue signals, not only digital computation.

第 3 步:小芯片需要大协作Step 3: Small chips need broad cooperation

越小是不是永远越好?Is smaller always better?

Small chips need broad cooperation
设计、制造、封装与测试都很重要。发热和制造缺陷会限制效果。基尔比与诺伊斯等人作出关键贡献。微电子来自多人的积累。Design, fabrication, packaging, and testing all matter. Heat and manufacturing defects constrain performance. Kilby, Noyce, and others made important contributions. Microelectronics grew through many people’s work.

🎮 机制实验室:观察,再判断🎮 Mechanism lab: observe, then decide

把两个开关都打开,输出才为一。这是逻辑关系示意,不是晶体管电路图。Turn on both inputs to produce one. This illustrates logic, not a transistor circuit diagram.

一句话记住它:Remember it: 集成电路把元件与连接缩进小片材料。背后仍是完整产业链。Integrated circuits shrink components and connections onto a chip within a much larger production system.
早期电路常连接独立元件。Earlier circuits often linked separate components.晶体管可用作电子开关。Transistors can act as electronic switches.设计、制造、封装与测试都很重要。Design, fabrication, packaging, and testing all matter.

来源与边界Sources and scope

Computer History Museum · Integrated Circuit

电路原理与多方贡献:较高把握。示意图不代表真实芯片布局或完整制造流程。High confidence in principles and multiple contributions. The diagram is not a real chip layout or complete fabrication process.

核对日期:2026 年 10 月 6 日。文字与配图由 AI 生成;已做来源核对及程序测试,待人工复核。Checked 6 October 2026. Text and illustrations are AI-generated. Sources and software checks were performed; human review is pending.